Sr. Memory Architect

Our Customer:

The company is a leading developer of next-generation semiconductor memory technologies.

Responsibilities:

• Lead development of novel NVM (ReRAM) memory modules in advanced nodes;
• Oversee memory design from architecture to layout, verification, and characterization;
• Align memory specs with system needs via customer and marketing collaboration;
• Optimize timing, power, and apply DFT strategies;
• Implement best practices for low-power, low-voltage, and low-leakage design.

Required Experience and Skills:

• 10+ years of hands-on experience in volatile or non-volatile memory design;
• Deep knowledge of memory architecture, analog circuit design, power/timing trade-offs, and semiconductor physics;
• Experience in memory timing and power characterization;
• Strong expertise in advanced CMOS processes (FDSOI, FinFET);
• Proficiency in low-power and high-reliability design practices;
• Skilled in Cadence Virtuoso, SPICE, Fast-SPICE and mixed-signal simulators;
• Familiarity with parasitic extraction, high-sigma analysis, and memory characterization flows;
• English – Upper-Intermediate.

Would be a plus:

• Experience with memory compiler development.